The trend toward more efficient, smaller, and quieter motors for white goods and other cost-sensitive, feature-rich applications is increasingly putting the design spotlight on a hybrid processor ...

Xilinx Inc has announced 11 pre-engineered DSP algorithms, which the company plans to license as Logicore products; DSP tools; and several embedded-DSP features for its next generation Virtex-II ...

Using a design flow put together by Mentor Graphics and Altera, designers can implement complex DSP algorithms in high-performance FPGAs directly from ANSI C++ code. The flow, which is based on Altera ...

Graceful Shutdown: Ensuring the motor and controller are shut down safely when the application is stopped. If the application operates on a multicore MCU/DSP/FPGA, an appropriate inter-core ...